latifbhatti

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active 2023-08-18 → 2026-05-30 (UTC) · 30 repositories

Complete coverage28,125 / 28,125 hourly files (100%) · 2 absent upstream2023-08-15 → 2026-10-29 (UTC)

Events

225

Pushes

134

Pull requests

Issues

Reviews

Repositories

Activity over time

Daily event counts in the loaded window

Pushes
Pull requests
Issues

Pull requests and issues are under-captured in the later part of this window. GH Archive progressively stopped recording non-push events during 2026 — −95% or worse by the end of the window. A decline in those two series reflects the archive rather than this account. Pushes stay reliable throughout, so read them as the real signal. Data health has the measurements.

Repositories worked on

Ranked by contributions — pushes, PRs, issues, reviews and comments, so stars and forks do not inflate the list

Repository	Contributions	Pushes	PRs	Issues	Comments	Last seen
merledu/vaquita	87	66	6	0	7	2025-08-18
merledu/nucleusrv	24	21	1	0	2	2025-03-22
latifbhatti/riscv-unified-db	20	20	0	0	0	2026-05-30
riscv-software-src/riscv-unified-db	13	0	1	2	10	2025-12-24
merledu/rvv-core	10	9	1	0	0	2023-09-06
merledu/Athestia	8	8	0	0	0	2025-05-06
latifbhatti/programs	4	4	0	0	0	2024-04-08
latifbhatti/nucleusrv	3	3	0	0	0	2025-02-12
riscv/riscv-v-spec	3	0	0	1	2	2023-09-06
vproc/vicuna	3	0	0	2	1	2023-10-19
riscv-software-src/riscv-isa-sim	2	0	0	2	0	2024-09-15
riscv/sail-riscv	2	0	0	0	2	2024-05-23
latifbhatti/idl-programming-challenge	1	1	0	0	0	2025-02-12
latifbhatti/LinkFree	1	1	0	0	0	2023-08-21
latifbhatti/ai_course	1	1	0	0	0	2024-03-14
chipsalliance/riscv-vector-tests	1	0	0	1	0	2024-09-13
riscv-non-isa/riscv-arch-test	1	0	0	0	1	2024-09-12
riscv/riscv-crypto	1	0	0	0	1	2024-03-07
latifbhatti/Riscv-Assembly	0	0	0	0	0	2025-02-12
latifbhatti/latifbhati	0	0	0	0	0	2023-09-19
dhower-qc/idl-programming-challenge	0	0	0	0	0	2025-02-10
latifbhatti/sparse	0	0	0	0	0	2025-02-12
EddieHubCommunity/LinkFree	0	0	0	0	0	2023-08-21
latifbhatti/Riscv-Single-Cycle-Cores	0	0	0	0	0	2025-02-12
merledu/SoC-Now-Generator	0	0	0	0	0	2025-01-01
chipsalliance/t1	0	0	0	0	0	2024-02-17
latifbhatti/v1	0	0	0	0	0	2024-07-12
latifbhatti/vaquita	0	0	0	0	0	2025-02-12
latifbhatti/five-stage-pipeline-swallow-core-	0	0	0	0	0	2025-02-12
Ali-975/VGA-controller	0	0	0	0	0	2025-01-11

Works with

People who contribute to the same repositories, ranked by how many they share · automation excluded, or every account would appear to work with everyone

Contributor	Shared repos	Repositories in common
SyedHassanUlHaq	6	merledu/vaquita merledu/nucleusrv riscv-non-isa/riscv-arch-test merledu/rvv-core+2
aswaterman	6	riscv/riscv-v-spec riscv-non-isa/riscv-arch-test riscv-software-src/riscv-isa-sim riscv/riscv-crypto+2
allenjbaum	5	riscv-non-isa/riscv-arch-test riscv-software-src/riscv-isa-sim riscv/riscv-crypto riscv-software-src/riscv-unified-db+1
Hafsa-shoaib989	4	merledu/vaquita merledu/nucleusrv merledu/Athestia merledu/rvv-core
MuhammadHammad001	4	riscv-non-isa/riscv-arch-test riscv-software-src/riscv-unified-db riscv-software-src/riscv-isa-sim riscv/sail-riscv
Myrausman	4	merledu/vaquita merledu/nucleusrv merledu/rvv-core riscv-software-src/riscv-isa-sim
aamartin0000	4	riscv/sail-riscv riscv-non-isa/riscv-arch-test riscv-software-src/riscv-isa-sim riscv/riscv-crypto
davidharrishmc	4	riscv-non-isa/riscv-arch-test riscv-software-src/riscv-unified-db riscv-software-src/riscv-isa-sim riscv/sail-riscv
jjscheel	4	riscv/sail-riscv riscv-non-isa/riscv-arch-test riscv-software-src/riscv-unified-db riscv/riscv-crypto
jordancarlin	4	riscv-non-isa/riscv-arch-test riscv-software-src/riscv-unified-db riscv-software-src/riscv-isa-sim riscv/sail-riscv
kdockser	4	riscv-software-src/riscv-unified-db riscv-software-src/riscv-isa-sim riscv/riscv-v-spec riscv/riscv-crypto
nadime15	4	riscv-non-isa/riscv-arch-test riscv-software-src/riscv-isa-sim chipsalliance/riscv-vector-tests riscv/sail-riscv
nibrunieAtSi5	4	riscv/sail-riscv riscv-non-isa/riscv-arch-test riscv-software-src/riscv-isa-sim riscv/riscv-crypto
rpsene	4	riscv/sail-riscv riscv-software-src/riscv-unified-db riscv-software-src/riscv-isa-sim riscv/riscv-crypto
sequencer	4	riscv/riscv-v-spec riscv-software-src/riscv-isa-sim chipsalliance/riscv-vector-tests riscv/sail-riscv
shahzaibk23	4	merledu/vaquita merledu/nucleusrv merledu/rvv-core riscv/sail-riscv
trdthg	4	riscv-non-isa/riscv-arch-test riscv-software-src/riscv-unified-db riscv-software-src/riscv-isa-sim riscv/sail-riscv
ved-rivos	4	riscv/sail-riscv riscv-non-isa/riscv-arch-test riscv-software-src/riscv-isa-sim riscv/riscv-crypto
ThinkOpenly	3	riscv/sail-riscv riscv-software-src/riscv-unified-db riscv/riscv-crypto
Timmmm	3	riscv-non-isa/riscv-arch-test riscv-software-src/riscv-isa-sim riscv/sail-riscv
a4lg	3	riscv/riscv-v-spec riscv-software-src/riscv-isa-sim riscv/riscv-crypto
bcstrongx	3	riscv-non-isa/riscv-arch-test riscv-software-src/riscv-isa-sim riscv/sail-riscv
camel-cdr	3	riscv-software-src/riscv-unified-db riscv-software-src/riscv-isa-sim riscv/riscv-v-spec
chihminchao	3	riscv-non-isa/riscv-arch-test riscv-software-src/riscv-isa-sim riscv/sail-riscv
christian-herber-nxp	3	riscv-software-src/riscv-unified-db riscv-software-src/riscv-isa-sim riscv/sail-riscv

Counts cover only the window loaded into ClickHouse and count events, not this account's lifetime totals on GitHub.