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wissygh

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active 2023-09-01 → 2026-09-11 (UTC) · 52 repositories

Complete coverage27,373 / 27,373 hourly files (100%) · 2 absent upstream2023-08-15 → 2026-09-28 (UTC)
Events
1K
Pushes
521
Pull requests
193
Issues
7
Reviews
49
Repositories
52

Activity over time

Daily event counts in the loaded window

Line chart, 1107 days from 2023-09-01 to 2026-09-11. Pushes: 522 total, peak 9 in a day. Pull requests: 193 total, peak 7 in a day. Issues: 7 total, peak 1 in a day.

  • Pushes
  • Pull requests
  • Issues

Pull requests and issues are under-captured in the later part of this window. GH Archive progressively stopped recording non-push events during 2026 — −95% or worse by the end of the window. A decline in those two series reflects the archive rather than this account. Pushes stay reliable throughout, so read them as the real signal. Data health has the measurements.

Repositories worked on

Ranked by contributions — pushes, PRs, issues, reviews and comments, so stars and forks do not inflate the list · top 50

RepositoryContributionsPushesPRsIssuesCommentsLast seen
OpenXiangShan/XiangShan3742191102112026-09-11
OpenXiangShan/NEMU1086733112026-07-13
wissygh/XiangShan1071060012025-11-27
wissygh/YunSuan49490002024-05-07
OpenXiangShan/ready-to-run342311002026-07-17
OpenXiangShan/YunSuan29714002026-01-29
wissygh/NEMU24240002026-06-17
OpenXiangShan/rocket-chip1769012026-03-02
riscv-software-src/riscv-isa-sim900082025-03-19
OpenXiangShan/riscv-isa-sim614002026-01-21
riscv-non-isa/riscv-trace-spec403012024-07-26
chipsalliance/rocket-chip404002025-06-13
OpenXiangShan/difftest321002024-09-30
OpenXiangShan/riscv-tests330002024-10-17
wissygh/riscv-isa-sim330002025-12-27
wissygh/riscv-trace-spec330002024-07-09
riscv/riscv-aia300212024-06-17
riscv/riscv-debug-spec300122023-12-11
wissygh/rocket-chip220002024-09-10
wissygh/riscv-tests220002024-05-30
riscv/riscv-isa-manual202002024-06-14
wissygh/riscv-isa-manual220002024-06-14
OpenXiangShan/ChiselAIA101002025-04-12
OpenXiangShan/CoupledL2110002026-03-20
OpenXiangShan/XiangShan-Design-Doc101002025-05-22
wissygh/ready-to-run110002024-04-10
riscv-collab/riscv-openocd100102025-12-24
wissygh/RISCV-M4F000002024-04-09
openhwgroup/cv32e40p000002024-01-24
pulp-platform/pulp_cluster000002025-01-20
IntelLabs/riscv-vector000002024-01-11
daniel5151/gdbstub000002024-10-24
mit-pdos/xv6-riscv000002024-08-19
pulp-platform/ara000002025-05-26
mborgerson/gdbstub000002024-10-24
OpenXiangShan/nexus-am000002023-10-30
pulp-platform/riscv-dbg000002024-01-24
Anduin2017/HowToCook000002023-10-23
openhwgroup/force-riscv000002024-03-07
SIEMENSIXONE/RISCV_Trace000002025-02-20
TapXWorld/ChinaTextbook000002025-08-07
qemu/qemu000002024-06-15
sifive/freedom-trace-decoder000002024-03-06
riscv/riscv-opcodes000002024-06-13
typst/typst000002024-09-20
OpenXiangShan/env-scripts000002023-11-08
LC044/WeChatMsg000002023-12-06
Yatekii/jep106000002025-07-08
zhenyu-zang/xv6-riscv-book-Chinese000002024-08-18
wissygh/difftest000002024-07-15

Works with

People who contribute to the same repositories, ranked by how many they share · automation excluded, or every account would appear to work with everyone

ContributorShared reposRepositories in common
poemonsense13
OpenXiangShan/rocket-chipriscv/riscv-isa-manualOpenXiangShan/ready-to-runOpenXiangShan/difftest+9
NewPaulWalker12
riscv/riscv-aiaOpenXiangShan/rocket-chipriscv/riscv-isa-manualOpenXiangShan/ready-to-run+8
Tang-Haojin12
OpenXiangShan/rocket-chipriscv/riscv-isa-manualOpenXiangShan/ready-to-runOpenXiangShan/difftest+8
sinceforYy12
OpenXiangShan/rocket-chipOpenXiangShan/ready-to-runOpenXiangShan/difftestOpenXiangShan/riscv-isa-sim+8
cyyself10
OpenXiangShan/rocket-chipriscv/riscv-isa-manualOpenXiangShan/ready-to-runOpenXiangShan/difftest+6
lewislzh10
OpenXiangShan/rocket-chipOpenXiangShan/ready-to-runOpenXiangShan/difftestOpenXiangShan/riscv-isa-sim+6
huxuan03079
OpenXiangShan/rocket-chipriscv/riscv-isa-manualOpenXiangShan/ready-to-runOpenXiangShan/difftest+5
Anzooooo8
OpenXiangShan/rocket-chipOpenXiangShan/ready-to-runOpenXiangShan/difftestOpenXiangShan/riscv-isa-sim+4
cebarobot8
riscv/riscv-isa-manualOpenXiangShan/ready-to-runOpenXiangShan/difftestOpenXiangShan/riscv-isa-sim+4
HeiHuDie7
OpenXiangShan/ready-to-runOpenXiangShan/difftestOpenXiangShan/riscv-isa-simOpenXiangShan/NEMU+3
Maxpicca-Li7
riscv/riscv-isa-manualOpenXiangShan/ready-to-runOpenXiangShan/difftestOpenXiangShan/riscv-isa-sim+3
good-circle7
OpenXiangShan/ready-to-runOpenXiangShan/difftestOpenXiangShan/riscv-isa-simOpenXiangShan/CoupledL2+3
Siudya6
OpenXiangShan/rocket-chipOpenXiangShan/difftestriscv-software-src/riscv-isa-simOpenXiangShan/CoupledL2+2
happy-lx6
OpenXiangShan/ready-to-runOpenXiangShan/difftestOpenXiangShan/CoupledL2OpenXiangShan/riscv-tests+2
linjuanZ6
OpenXiangShan/rocket-chipOpenXiangShan/difftestOpenXiangShan/CoupledL2OpenXiangShan/NEMU+2
ngc73316
OpenXiangShan/rocket-chipOpenXiangShan/difftestchipsalliance/rocket-chipOpenXiangShan/NEMU+2
skyhgzsh6
riscv/riscv-isa-manualOpenXiangShan/ready-to-runOpenXiangShan/difftestOpenXiangShan/NEMU+2
Kumonda221-CrO35
OpenXiangShan/rocket-chipOpenXiangShan/difftestOpenXiangShan/CoupledL2OpenXiangShan/XiangShan+1
Lemover5
OpenXiangShan/difftestOpenXiangShan/riscv-isa-simOpenXiangShan/CoupledL2OpenXiangShan/NEMU+1
TommyMurphyTM12345
riscv/riscv-isa-manualriscv-software-src/riscv-isa-simchipsalliance/rocket-chipriscv-collab/riscv-openocd+1
Ziyue-Zhang5
OpenXiangShan/ready-to-runOpenXiangShan/difftestOpenXiangShan/NEMUOpenXiangShan/YunSuan+1
aswaterman5
riscv/riscv-aiariscv/riscv-isa-manualriscv-software-src/riscv-isa-simchipsalliance/rocket-chip+1
bcstrongx5
riscv/riscv-aiariscv/riscv-isa-manualriscv-software-src/riscv-isa-simriscv-non-isa/riscv-trace-spec+1
cz4e5
OpenXiangShan/difftestOpenXiangShan/CoupledL2OpenXiangShan/NEMUOpenXiangShan/XiangShan+1
eastonman5
OpenXiangShan/rocket-chipOpenXiangShan/difftestOpenXiangShan/NEMUOpenXiangShan/XiangShan+1

Counts cover only the window loaded into ClickHouse and count events, not this account's lifetime totals on GitHub.