xiaoweish

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active 2024-04-17 → 2026-06-06 (UTC) · 227 repositories

Complete coverage26,526 / 26,526 hourly files (100%) · 2 absent upstream2023-08-15 → 2026-08-24 (UTC)

Events

1.2K

Pushes

107

Pull requests

Issues

Reviews

Repositories

227

Activity over time

Daily event counts in the loaded window

Pushes
Pull requests
Issues

Pull requests and issues are under-captured in the later part of this window. GH Archive progressively stopped recording non-push events during 2026 — −95% or worse by the end of the window. A decline in those two series reflects the archive rather than this account. Pushes stay reliable throughout, so read them as the real signal. Data health has the measurements.

Repositories worked on

Ranked by contributions — pushes, PRs, issues, reviews and comments, so stars and forks do not inflate the list · top 50

Repository	Contributions	Pushes	PRs	Issues	Comments	Last seen
openhwgroup/cva6	50	0	13	5	31	2024-07-31
xiaoweish/cva6	34	32	2	0	0	2025-03-07
xiaoweish/riscv-fast-interrupt	20	20	0	0	0	2025-01-10
xiaoweish/rocket-tools	11	11	0	0	0	2024-12-18
xiaoweish/core-v-verif	9	7	2	0	0	2024-07-05
openhwgroup/core-v-verif	8	0	5	0	2	2024-07-05
xiaoweish/vim-pathogen	6	6	0	0	0	2024-11-11
xiaoweish/opentitan	4	4	0	0	0	2026-04-01
xiaoweish/riscv.vim	4	4	0	0	0	2024-11-11
riscv/riscv-fast-interrupt	3	0	0	1	2	2025-04-08
xiaoweish/riscv-dv	3	2	1	0	0	2024-05-20
riscv-non-isa/riscv-arch-test	3	0	0	0	1	2024-09-24
xiaoweish/opene902	2	2	0	0	0	2025-05-09
xiaoweish/sail-riscv	2	1	1	0	0	2024-08-06
openhwgroup/cv32e40x	2	0	0	0	2	2024-11-15
xiaoweish/fieldtrip	2	1	1	0	0	2025-11-05
riscv/riscv-debug-spec	2	0	0	1	1	2025-04-04
xiaoweish/tt-dfd	2	2	0	0	0	2026-04-01
xiaoweish/litmus-tests-riscv	2	1	1	0	0	2025-12-25
xiaoweish/tarmac-trace-utilities	2	2	0	0	0	2024-09-14
xiaoweish/vortex	2	2	0	0	0	2025-03-16
xiaoweish/qemu	1	0	1	0	0	2024-11-04
xiaoweish/riscv-isa-sim	1	1	0	0	0	2024-11-25
xiaoweish/coralnpu	1	1	0	0	0	2026-02-05
xiaoweish/git-cheatsheet	1	1	0	0	0	2026-05-18
riscv-non-isa/server-soc	1	0	0	1	0	2025-08-21
xiaoweish/libsystemctlm-soc	1	1	0	0	0	2025-12-30
riscv/riscv-test-env	1	0	0	0	1	2024-08-22
xiaoweish/leon3-grlib-gpl-mirror	1	1	0	0	0	2024-06-19
xiaoweish/riscv-aia-tests	1	1	0	0	0	2025-09-02
xiaoweish/Cores-SweRV-riscof	1	1	0	0	0	2024-12-27
xiaoweish/libmetal	1	1	0	0	0	2025-11-26
sifive/duh-ipxact	1	0	0	1	0	2024-05-20
xiaoweish/bedrock-rtl	1	1	0	0	0	2025-03-28
xiaoweish/sysarch-acs	1	1	0	0	0	2025-12-10
xiaoweish/gitlab-handbook	0	0	0	0	0	2026-01-28
xiaoweish/microtesk-riscv-ispras	0	0	0	0	0	2024-08-26
xiaoweish/svlib	0	0	0	0	0	2026-05-25
xiaoweish/qspi_vip-incoresemi	0	0	0	0	0	2024-07-10
syntacore/scr1	0	0	0	0	0	2024-12-08
SpinalHDL/VexRiscv	0	0	0	0	0	2024-08-23
tenstorrent/tt-dfd	0	0	0	0	0	2025-09-25
chipsalliance/caliptra-rtl	0	0	0	0	0	2026-01-24
xiaoweish/RainnieLabInVivo	0	0	0	0	0	2025-11-01
derekjchow-google/kelvin	0	0	0	0	0	2025-06-30
xxwang1/OpenGCRAM	0	0	0	0	0	2026-01-29
JJ-Gaisler/riscv-dv	0	0	0	0	0	2024-07-02
alibaba/thrive-chipgen	0	0	0	0	0	2025-06-05
OFS/ofs-agx7-pcie-attach	0	0	0	0	0	2025-06-25
EntityFX/anybench	0	0	0	0	0	2025-03-13

Works with

People who contribute to the same repositories, ranked by how many they share · automation excluded, or every account would appear to work with everyone

Contributor	Shared repos	Repositories in common
Silabs-ArjanB	5	openhwgroup/core-v-verif riscv-non-isa/riscv-arch-test openhwgroup/cv32e40x riscv/riscv-fast-interrupt+1
MikeOpenHWGroup	4	riscv-non-isa/riscv-arch-test openhwgroup/cva6 openhwgroup/core-v-verif openhwgroup/cv32e40x
aswaterman	4	riscv-non-isa/riscv-arch-test riscv/riscv-fast-interrupt riscv/riscv-debug-spec riscv/riscv-test-env
Ammarkhan561	3	riscv-non-isa/riscv-arch-test openhwgroup/cva6 openhwgroup/core-v-verif
davidharrishmc	3	riscv-non-isa/riscv-arch-test openhwgroup/cva6 riscv/riscv-debug-spec
james-ball-qualcomm	3	riscv-non-isa/riscv-arch-test riscv/riscv-fast-interrupt riscv/riscv-debug-spec
kbroch-rivosinc	3	riscv-non-isa/server-soc riscv/riscv-fast-interrupt riscv/riscv-debug-spec
rpsene	3	riscv-non-isa/server-soc riscv/riscv-fast-interrupt riscv/riscv-debug-spec
silabs-oysteink	3	openhwgroup/core-v-verif openhwgroup/cv32e40x riscv/riscv-fast-interrupt
silabs-robin	3	openhwgroup/core-v-verif openhwgroup/cv32e40x riscv/riscv-fast-interrupt
ved-rivos	3	riscv-non-isa/riscv-arch-test riscv-non-isa/server-soc riscv/riscv-debug-spec
wmat	3	riscv-non-isa/server-soc riscv/riscv-fast-interrupt riscv/riscv-debug-spec
AEzzejjari	2	openhwgroup/cva6 openhwgroup/core-v-verif
ASintzoff	2	openhwgroup/cva6 openhwgroup/core-v-verif
Abdulwadoodd	2	riscv-non-isa/riscv-arch-test openhwgroup/cva6
Amit-Matth	2	riscv-non-isa/riscv-arch-test openhwgroup/core-v-verif
AyoubJalali	2	openhwgroup/cva6 openhwgroup/core-v-verif
Bill94l	2	riscv-non-isa/riscv-arch-test openhwgroup/cva6
CoralieAllioux	2	openhwgroup/cva6 openhwgroup/core-v-verif
DBees	2	openhwgroup/cva6 openhwgroup/cv32e40x
DymShanks	2	openhwgroup/cva6 riscv/riscv-fast-interrupt
Gchauvon	2	openhwgroup/cva6 openhwgroup/core-v-verif
IhsaneTahir	2	openhwgroup/cva6 openhwgroup/core-v-verif
JamesKenneyImperas	2	riscv/riscv-fast-interrupt riscv/riscv-debug-spec
JeanRochCoulon	2	openhwgroup/cva6 openhwgroup/core-v-verif

Counts cover only the window loaded into ClickHouse and count events, not this account's lifetime totals on GitHub.