Skip to content
GitHub Explorer

Adam0Brien/Embedded-Systems-ALU

View on GitHub ↗Related repositories →

The purpose of this assignment is to create a simple arithmetic logic unit using VHDL and to simulate it to examine its operation using ISE

active 2023-10-10 → 2023-10-26 (UTC)

Complete coverage26,507 / 26,507 hourly files (100%) · 2 absent upstream2023-08-15 → 2026-08-23 (UTC)
Events
13
Pushes
10
Pull requests
2
Issues
0
Stars
0
Forks
0

Activity over time

Daily event counts in the loaded window

Line chart, 17 days from 2023-10-10 to 2023-10-26. Pushes: 10 total, peak 6 in a day. Pull requests: 2 total, peak 2 in a day. Issues: 0 total, peak 0 in a day. Comments: 0 total, peak 0 in a day. Stars: 0 total, peak 0 in a day.

  • Pushes
  • Pull requests
  • Issues
  • Comments
  • Stars

Top contributors

Pushes, PRs, issues, reviews and comments — stars and forks excluded, so this is contribution rather than popularity

ContributorContributionsPushesPRsComments
Adam0Brien121020

Recent activity

Latest issues, pull requests and releases

  • Pull request#3Adam0Brien2023-10-10 21:32
  • Pull request#3Adam0Brien2023-10-10 21:32

Totals cover only the window loaded into ClickHouse and count events, not GitHub's lifetime totals — 0 stars here means stars gained during the window, not the repo's star count.