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SystemVerilog 2017 Pre-processor, Parser, Elaborator, UHDM Compiler. Provides IEEE Design/TB C/C++ VPI and Python AST API.

active 2023-08-17 → 2026-05-09 (UTC)

Complete coverage27,901 / 27,901 hourly files (100%) · 2 absent upstream2023-08-15 → 2026-10-20 (UTC)
Events
680
Pushes
567
Pull requests
1
Issues
0
Stars
2
Forks
1

Activity over time

Daily event counts in the loaded window

Line chart, 997 days from 2023-08-17 to 2026-05-09. Pushes: 567 total, peak 21 in a day. Pull requests: 1 total, peak 1 in a day. Issues: 0 total, peak 0 in a day. Comments: 0 total, peak 0 in a day. Stars: 2 total, peak 1 in a day.

  • Pushes
  • Pull requests
  • Issues
  • Comments
  • Stars

Stars, PRs, issues and forks are under-captured in the later part of this window. GH Archive progressively stopped capturing non-push events during 2026 — −95% or worse by the end of the window. Every series here except Pushes fades for that reason, so a decline above reflects the archive, not this repository. Pushes stay reliable throughout, so read them, and the contributor counts derived from them, as the real signal. Data health has the measurements.

Top contributors

Pushes, PRs, issues, reviews and comments — stars and forks excluded, so this is contribution rather than popularity

ContributorContributionsPushesPRsComments
hs-apotell24724700
karsin8818518500
saransha6999900
RomiKothari131210
Prakansha121200
amarjeeteternal6600
atharvRsharma5500

Recent activity

Latest issues, pull requests and releases

  • Pull request#2RomiKothari2025-06-30 18:46

Totals cover only the window loaded into ClickHouse and count events, not GitHub's lifetime totals — 2 stars here means stars gained during the window, not the repo's star count.