Final Project of the Computer Architecture (ICOM4215) course, Spring 2023. The project documents the journey of three students learning the basics of the vast world of FPGAs and hardware design in general. Here We designed a SPARC-Based Processor in Verilog :D
active 2023-09-14 → 2024-10-03 (UTC)
Activity over time
Daily event counts in the loaded window
Line chart, 386 days from 2023-09-14 to 2024-10-03. Pushes: 0 total, peak 0 in a day. Pull requests: 0 total, peak 0 in a day. Issues: 0 total, peak 0 in a day. Comments: 0 total, peak 0 in a day. Stars: 2 total, peak 1 in a day.
- Pushes
- Pull requests
- Issues
- Comments
- Stars
Top contributors
Pushes, PRs, issues, reviews and comments — stars and forks excluded, so this is contribution rather than popularity
Nobody pushed, opened or commented here in the loaded window — this repo's activity is stars and forks only.
Recent activity
Latest issues, pull requests and releases
- ReleaseFrenzyExists2023-09-14 04:54Twinkle Twinkle Little Sparc
Totals cover only the window loaded into ClickHouse and count events, not GitHub's lifetime totals — 2 stars here means stars gained during the window, not the repo's star count.