基于 RISC-V 的 RV32I 指令集的串行计算单元，用 Verilog 实现，能够执行基本指令、存储和读取数据，并通过七段数码管展示结果。A serial compute unit based on the RV32I instruction set of RISC - V, implemented with Verilog, capable of executing basic instructions, storing and retrieving data, and presenting results through a 7 - segment display.
active 2025-02-26 → 2025-03-21 (UTC)
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Line chart, 24 days from 2025-02-26 to 2025-03-21. Pushes: 2 total, peak 1 in a day. Pull requests: 0 total, peak 0 in a day. Issues: 0 total, peak 0 in a day. Comments: 0 total, peak 0 in a day. Stars: 2 total, peak 1 in a day.
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Top contributors
Pushes, PRs, issues, reviews and comments — stars and forks excluded, so this is contribution rather than popularity
| Contributor | Contributions | Pushes | PRs | Comments |
|---|---|---|---|---|
| JonathanLiang6 | 2 | 2 | 0 | 0 |
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