"Reservoir in Processor" implemented in SystemVerilog based on RISC-V ISA
active 2023-12-15 → 2024-06-29 (UTC)
Complete coverage26,400 / 26,400 hourly files (100%) · 2 absent upstream2023-08-15 → 2026-08-18 (UTC)
Events
36
Pushes
21
Pull requests
2
Issues
0
Stars
7
Forks
0
Activity over time
Daily event counts in the loaded window
Line chart, 198 days from 2023-12-15 to 2024-06-29. Pushes: 21 total, peak 3 in a day. Pull requests: 2 total, peak 1 in a day. Issues: 0 total, peak 0 in a day. Comments: 0 total, peak 0 in a day. Stars: 7 total, peak 3 in a day.
- Pushes
- Pull requests
- Issues
- Comments
- Stars
Top contributors
Pushes, PRs, issues, reviews and comments — stars and forks excluded, so this is contribution rather than popularity
| Contributor | Contributions | Pushes | PRs | Comments |
|---|---|---|---|---|
| sh-mug | 24 | 21 | 2 | 0 |
Recent activity
Latest issues, pull requests and releases
- Pull request#23sh-mug2024-03-26 06:36
- Pull request#19sh-mug2024-02-09 07:25
Totals cover only the window loaded into ClickHouse and count events, not GitHub's lifetime totals — 7 stars here means stars gained during the window, not the repo's star count.