VamshiTeja001/Systollic-Array-Accelerator-based-on-Google-tensor-Processing-Unit
View on GitHub ↗Related repositories →Contains files for a digital ASIC design capable of performing matrix multiplication using a systolic array architecture. This architecture is based on Google’s Tensor Processing Unit (TPU)
active 2025-02-02 → 2025-03-06 (UTC)
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