Verilog project for EE2026 Digital Design. Created various applications on the FPGA, in particular one which allows for drawing of an image and uses audio at varying frequencies to transmit the images bitwise to another FPGA device.
active 2023-09-10 → 2023-10-30 (UTC)
Activity over time
Daily event counts in the loaded window
Line chart, 51 days from 2023-09-10 to 2023-10-30. Pushes: 1 total, peak 1 in a day. Pull requests: 0 total, peak 0 in a day. Issues: 0 total, peak 0 in a day. Comments: 0 total, peak 0 in a day. Stars: 0 total, peak 0 in a day.
- Pushes
- Pull requests
- Issues
- Comments
- Stars
Top contributors
Pushes, PRs, issues, reviews and comments — stars and forks excluded, so this is contribution rather than popularity
| Contributor | Contributions | Pushes | PRs | Comments |
|---|---|---|---|---|
| TongZhengHong | 1 | 1 | 0 | 0 |
Recent activity
Latest issues, pull requests and releases
No issue or PR events — this repo's activity is pushes only.
Totals cover only the window loaded into ClickHouse and count events, not GitHub's lifetime totals — 0 stars here means stars gained during the window, not the repo's star count.