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abdulrahmanibrhem/Digital-Systems-Testing-and-Verification-Project

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Final project starter kit for Digital Design Verification (Ain Shams University, Spring 2026) — verify an SPI Master Controller using SystemVerilog constrained-random testbenches, functional coverage, and SVA. UVM optional.

active 2026-05-132026-05-14 (UTC)

Complete coverage26,675 / 26,675 hourly files (100%) · 2 absent upstream2023-08-152026-08-30 (UTC)
Events
14
Pushes
7
Pull requests
1
Issues
0
Stars
0
Forks
0

Activity over time

Daily event counts in the loaded window

Line chart, 2 days from 2026-05-13 to 2026-05-14. Pushes: 7 total, peak 6 in a day. Pull requests: 1 total, peak 1 in a day. Issues: 0 total, peak 0 in a day. Comments: 0 total, peak 0 in a day. Stars: 0 total, peak 0 in a day.

  • Pushes
  • Pull requests
  • Issues
  • Comments
  • Stars

Stars, PRs, issues and forks are under-captured in the later part of this window. GH Archive progressively stopped capturing non-push events during 2026 — −95% or worse by the end of the window. Every series here except Pushes fades for that reason, so a decline above reflects the archive, not this repository. Pushes stay reliable throughout, so read them, and the contributor counts derived from them, as the real signal. Data health has the measurements.

Top contributors

Pushes, PRs, issues, reviews and comments — stars and forks excluded, so this is contribution rather than popularity

ContributorContributionsPushesPRsComments
ahmedtaha20034400
abdulrahmanibrhem3300
Eyad-aboshama1010

Recent activity

Latest issues, pull requests and releases

  • Pull request#2Eyad-aboshama2026-05-14 11:01

Totals cover only the window loaded into ClickHouse and count events, not GitHub's lifetime totals — 0 stars here means stars gained during the window, not the repo's star count.