A C++ simulator for L1/L2 cache levels with a configurable stream-buffer prefetch unit, implementing the WBWA policy. Simulates cache performance with varying size, associativity, and block size using SPEC 2006/2007 benchmarks. Analyzes cache configurations to optimize microprocessor architecture performance.
active 2024-11-04 → 2024-11-12 (UTC)
Activity over time
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Line chart, 9 days from 2024-11-04 to 2024-11-12. Pushes: 15 total, peak 8 in a day. Pull requests: 0 total, peak 0 in a day. Issues: 0 total, peak 0 in a day. Comments: 0 total, peak 0 in a day. Stars: 0 total, peak 0 in a day.
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Top contributors
Pushes, PRs, issues, reviews and comments — stars and forks excluded, so this is contribution rather than popularity
| Contributor | Contributions | Pushes | PRs | Comments |
|---|---|---|---|---|
| dev-the-desai | 15 | 15 | 0 | 0 |
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Totals cover only the window loaded into ClickHouse and count events, not GitHub's lifetime totals — 0 stars here means stars gained during the window, not the repo's star count.