This project aims at learning Digital Design and Verilog using FPGA board - Edge Spartan6
active 2024-01-19 → 2024-12-23 (UTC)
Complete coverage27,971 / 27,971 hourly files (100%) · 2 absent upstream2023-08-15 → 2026-10-23 (UTC)
Events
62
Pushes
20
Pull requests
3
Issues
0
Stars
2
Forks
1
Activity over time
Daily event counts in the loaded window
Line chart, 340 days from 2024-01-19 to 2024-12-23. Pushes: 20 total, peak 6 in a day. Pull requests: 3 total, peak 3 in a day. Issues: 0 total, peak 0 in a day. Comments: 3 total, peak 3 in a day. Stars: 2 total, peak 1 in a day.
- Pushes
- Pull requests
- Issues
- Comments
- Stars
Top contributors
Pushes, PRs, issues, reviews and comments — stars and forks excluded, so this is contribution rather than popularity
| Contributor | Contributions | Pushes | PRs | Comments |
|---|---|---|---|---|
| muneebullashariff | 8 | 2 | 3 | 3 |
| rakshitharnayak | 6 | 6 | 0 | 0 |
| amansasidharan | 3 | 3 | 0 | 0 |
| Soujanyasalonkar | 2 | 2 | 0 | 0 |
| Srivathsa2304 | 2 | 2 | 0 | 0 |
| poojarynikitha | 1 | 1 | 0 | 0 |
| srikala-reddi | 1 | 1 | 0 | 0 |
| Sameekshapu | 1 | 1 | 0 | 0 |
| Rakesh2916728272727 | 1 | 1 | 0 | 0 |
| Prasthuthi | 1 | 1 | 0 | 0 |
Recent activity
Latest issues, pull requests and releases
Totals cover only the window loaded into ClickHouse and count events, not GitHub's lifetime totals — 2 stars here means stars gained during the window, not the repo's star count.