AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication
active 2023-08-15 → 2026-08-27 (UTC)
Activity over time
Daily event counts in the loaded window
Line chart, 1109 days from 2023-08-15 to 2026-08-27. Pushes: 242 total, peak 12 in a day. Pull requests: 90 total, peak 5 in a day. Issues: 28 total, peak 2 in a day. Comments: 99 total, peak 6 in a day. Stars: 645 total, peak 5 in a day.
- Pushes
- Pull requests
- Issues
- Comments
- Stars
Stars, PRs, issues and forks are under-captured in the later part of this window. GH Archive progressively stopped capturing non-push events during 2026 — −95% or worse by the end of the window. Every series here except Pushes fades for that reason, so a decline above reflects the archive, not this repository. Pushes stay reliable throughout, so read them, and the contributor counts derived from them, as the real signal. Data health has the measurements.
Top contributors
Pushes, PRs, issues, reviews and comments — stars and forks excluded, so this is contribution rather than popularity
| Contributor | Contributions | Pushes | PRs | Comments |
|---|---|---|---|---|
| micprog | 204 | 133 | 23 | 26 |
| thommythomaso | 86 | 38 | 19 | 6 |
| colluca | 39 | 17 | 4 | 16 |
| niwis | 14 | 8 | 2 | 2 |
| imchenwu | 12 | 11 | 0 | 0 |
| Alvin-FA | 12 | 0 | 7 | 4 |
| fischeti | 8 | 6 | 2 | 0 |
| luca-valente | 7 | 3 | 1 | 2 |
| ricted98 | 6 | 5 | 1 | 0 |
| Aquaticfuller | 5 | 4 | 1 | 0 |
| michael-platzer | 5 | 0 | 1 | 2 |
| chaoqun-liang | 5 | 5 | 0 | 0 |
| olofk | 5 | 0 | 1 | 3 |
| omeag | 4 | 0 | 0 | 2 |
| LucaRufer | 4 | 0 | 2 | 2 |
| FrancescoConti | 4 | 0 | 0 | 1 |
| 0BAB1 | 4 | 0 | 0 | 2 |
| paulsc96 | 4 | 0 | 2 | 1 |
| phsauter | 3 | 1 | 2 | 0 |
| MaanasSanaam | 3 | 0 | 0 | 1 |
Recent activity
Latest issues, pull requests and releases
- Issue comment#419mlyoung1012026-05-05 04:08tb_axi_xbar contains (possibly) invalid SystemVerilog
- Issue comment#412atabackTT2026-02-20 00:30Fixed axi_lite_mailbox wstrb axi violation (issue #411)
- Pull request#407colluca2026-02-10 15:08
- Issue comment#406micprog2026-01-29 18:22`axi_demux_id_counters`: Separate to own module and add port
- Pull request#407colluca2026-01-29 17:57
- Pull request#405uge2026-01-29 16:53
- Pull request#405uge2026-01-27 19:41
- Issue comment#403marnovandermaas2026-01-21 10:26FF macro termination corrected
- Issue#401roowatt2025-11-27 23:49AXI Clock Conversion
- Releasethommythomaso2025-11-21 11:05v0.39.9
- Issue comment#391cousteaulecommandant2025-10-31 14:37Use XSIM define to remove all default disable blocks under src directory
- Pull request#397phsauter2025-09-15 13:24
- Pull request#386thommythomaso2025-09-09 06:25
- Pull request#393thommythomaso2025-09-09 06:20
- Issue#394taytruongcnx2025-08-25 03:39Question about tools used for block diagrams in documentation
- Issue comment#390micprog2025-08-22 17:05Add an isolatable CDC module
- Pull request#393mrogenmoserTT2025-08-20 20:30
- Pull request#391jmdeharor2025-07-29 08:02
- Pull request#390LucaRufer2025-07-25 07:29
- Pull request#387micprog2025-07-24 16:18
- Pull request#383micprog2025-07-24 16:17
- Issue comment#383micprog2025-07-24 16:08axi_to_detailed_mem: Avoid spurious write responses with HideStrb
- Issue comment#383MaxWipfli2025-07-24 15:50axi_to_detailed_mem: Avoid spurious write responses with HideStrb
- Pull request#389mrogenmoserTT2025-07-24 15:14
- Issue comment#387Scheremo2025-07-24 11:51axi_burst_unwrap: Only send w_cnt_req iff there are outstanding write transaction
Totals cover only the window loaded into ClickHouse and count events, not GitHub's lifetime totals — 645 stars here means stars gained during the window, not the repo's star count.