Synth — WebAssembly-to-native compiler for ARM Cortex-M/R (Thumb-2/A32), RISC-V RV32, and AArch64, with mechanized Rocq correctness proofs, per-compilation translation validation, and sound WCET bounds. Part of the PulseEngine toolchain.
active 2026-02-20 → 2026-08-19 (UTC)
Activity over time
Daily event counts in the loaded window
Line chart, 181 days from 2026-02-20 to 2026-08-19. Pushes: 363 total, peak 18 in a day. Pull requests: 53 total, peak 7 in a day. Issues: 24 total, peak 10 in a day. Comments: 43 total, peak 6 in a day. Stars: 0 total, peak 0 in a day.
- Pushes
- Pull requests
- Issues
- Comments
- Stars
Stars, PRs, issues and forks are under-captured in the later part of this window. GH Archive progressively stopped capturing non-push events during 2026 — −95% or worse by the end of the window. Every series here except Pushes fades for that reason, so a decline above reflects the archive, not this repository. Pushes stay reliable throughout, so read them, and the contributor counts derived from them, as the real signal. Data health has the measurements.
Top contributors
Pushes, PRs, issues, reviews and comments — stars and forks excluded, so this is contribution rather than popularity
| Contributor | Contributions | Pushes | PRs | Comments |
|---|---|---|---|---|
| avrabe | 416 | 324 | 50 | 27 |
| temper-pulseengine[bot] | 32 | 21 | 0 | 2 |
| dependabot[bot] | 20 | 17 | 3 | 0 |
| codecov[bot] | 14 | 0 | 0 | 14 |
| github-actions[bot] | 1 | 1 | 0 | 0 |
Recent activity
Latest issues, pull requests and releases
- Pull request#927avrabe2026-08-07 18:02
- Issue comment#926temper-pulseengine[bot]2026-08-07 17:49plan(v0.56): release scope in rivet — 6 artifacts, readiness now a query
- Releasegithub-actions[bot]2026-08-07 17:22synth v0.55.0
- Issue comment#851avrabe2026-08-07 17:19aarch64 backend completeness: execution-verified capability map + remaining gaps (memory, non-param locals, calls, if/loop/return, div/rem, popcnt)
- Issue comment#893avrabe2026-08-07 17:19Traceability: VCR-RA-004 rivet ID reused for unrelated work; VCR-SEL-005 description says two backends
- Issue comment#910avrabe2026-08-07 17:19Coverage is blind to the execution differentials — the numbers understate, and can't be read as completeness either
- Pull request#925avrabe2026-08-07 16:19
- Pull request#589avrabe2026-07-03 00:24
- Pull request#576avrabe2026-07-02 14:55
- Issue comment#574codecov[bot]2026-07-02 12:32chore(release): v0.22.1 — DWARF CU high_pc containment regression fix (#564)
- Issue comment#573codecov[bot]2026-07-02 12:08fix(dwarf): CU DW_AT_high_pc covers child subprogram code extents (#564)
- Pull request#571avrabe2026-07-02 10:41
- Issue#382avrabe2026-07-01 23:43arm backend skips functions with load/store immediate offset > 0xFFF — needs offset materialization (surfaced by gust wasm kernel init)
- Pull request#534dependabot[bot]2026-07-01 17:58
- Issue comment#394avrabe2026-06-30 19:39Emit DWARF in the ARM/RISC-V ELF — synth drops debug info; bare-metal output is not source-debuggable
- Pull request#523avrabe2026-06-27 01:41
- Pull request#523avrabe2026-06-27 01:24
- Pull request#522avrabe2026-06-27 00:43
- Issue comment#520codecov[bot]2026-06-26 21:37docs(rivet): VCR-DEC-003 — settle synth-provenance-v1 contract for witness MC/DC reconciliation (#396)
- Pull request#508avrabe2026-06-26 06:59
- Pull request#505avrabe2026-06-26 05:09
- Pull request#480avrabe2026-06-25 03:17
- Pull request#431dependabot[bot]2026-06-24 05:39
- Issue comment#387codecov[bot]2026-06-20 05:43feat(vcr-sel): cross-backend op-parity oracle — gate RV32-vs-ARM op-gaps (VCR-SEL-005, #242)
- Pull request#385avrabe2026-06-19 22:23
Totals cover only the window loaded into ClickHouse and count events, not GitHub's lifetime totals — 0 stars here means stars gained during the window, not the repo's star count.