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ganeshgore

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active 2023-08-21 → 2026-08-23 (UTC) · 17 repositories

Complete coverage28,009 / 28,009 hourly files (100%) · 2 absent upstream2023-08-15 → 2026-10-25 (UTC)
Events
323
Pushes
231
Pull requests
10
Issues
3
Reviews
10
Repositories
17

Activity over time

Daily event counts in the loaded window

Line chart, 1099 days from 2023-08-21 to 2026-08-23. Pushes: 231 total, peak 14 in a day. Pull requests: 10 total, peak 2 in a day. Issues: 3 total, peak 1 in a day.

  • Pushes
  • Pull requests
  • Issues

Pull requests and issues are under-captured in the later part of this window. GH Archive progressively stopped recording non-push events during 2026 — −95% or worse by the end of the window. A decline in those two series reflects the archive rather than this account. Pushes stay reliable throughout, so read them as the real signal. Data health has the measurements.

Repositories worked on

Ranked by contributions — pushes, PRs, issues, reviews and comments, so stars and forks do not inflate the list

RepositoryContributionsPushesPRsIssuesCommentsLast seen
ganeshgore/spydrnet-physical1251191222026-08-23
lnis-uofu/OpenFPGA74537092026-06-03
ganeshgore/spydrnet54540002025-05-05
verilog-to-routing/vtr-verilog-to-routing1020042025-04-28
byuccl/spydrnet702142024-03-11
QL-Proprietary/OpenFPGA330002026-02-13
zeroasiccorp/logik000002024-04-05
chili-chips-ba/openCologne000002025-01-27
mellobacon/Nucleus000002025-03-22
toddmaustin/bringup-bench000002025-04-16
FPGA-Research-Manchester/FABulous000002023-12-09
lnis-uofu/SOFA000002025-03-17
gdsfactory/kweb000002025-05-02
open-sciencelab/Awesome-Scientific-Datasets-and-LLMs000002025-09-05
mario33881/blifparser000002024-06-30
aolofsson/oh000002025-11-13
najaeda/naja000002025-02-24

Works with

People who contribute to the same repositories, ranked by how many they share · automation excluded, or every account would appear to work with everyone

ContributorShared reposRepositories in common
fkosar-ql3
QL-Proprietary/OpenFPGAlnis-uofu/OpenFPGAverilog-to-routing/vtr-verilog-to-routing
tpagarani3
QL-Proprietary/OpenFPGAlnis-uofu/OpenFPGAverilog-to-routing/vtr-verilog-to-routing
AhmadHouraniah2
lnis-uofu/OpenFPGAganeshgore/spydrnet-physical
AllenDBoston2
verilog-to-routing/vtr-verilog-to-routinglnis-uofu/OpenFPGA
Nakiana2
verilog-to-routing/vtr-verilog-to-routinglnis-uofu/OpenFPGA
Tulong4Dev2
verilog-to-routing/vtr-verilog-to-routinglnis-uofu/OpenFPGA
WazaAbdulkadir2
verilog-to-routing/vtr-verilog-to-routinglnis-uofu/OpenFPGA
alaindargelas2
verilog-to-routing/vtr-verilog-to-routinglnis-uofu/OpenFPGA
amin13772
verilog-to-routing/vtr-verilog-to-routinglnis-uofu/OpenFPGA
coolbreeze4132
verilog-to-routing/vtr-verilog-to-routinglnis-uofu/OpenFPGA
jgoeders2
verilog-to-routing/vtr-verilog-to-routingbyuccl/spydrnet
msaideroglu2
verilog-to-routing/vtr-verilog-to-routinglnis-uofu/OpenFPGA
mustafaarslan02
verilog-to-routing/vtr-verilog-to-routinglnis-uofu/OpenFPGA
narutozxp2
verilog-to-routing/vtr-verilog-to-routinglnis-uofu/OpenFPGA
rs-dhow2
verilog-to-routing/vtr-verilog-to-routinglnis-uofu/OpenFPGA
saaramahmoudi2
verilog-to-routing/vtr-verilog-to-routinglnis-uofu/OpenFPGA
tangxifan2
verilog-to-routing/vtr-verilog-to-routinglnis-uofu/OpenFPGA
treelin6112
verilog-to-routing/vtr-verilog-to-routinglnis-uofu/OpenFPGA
vaughnbetz2
verilog-to-routing/vtr-verilog-to-routinglnis-uofu/OpenFPGA
AidanJacobsen1
lnis-uofu/OpenFPGA
AlexPoupakis1
verilog-to-routing/vtr-verilog-to-routing
AlexandreSinger1
verilog-to-routing/vtr-verilog-to-routing
AmirhosseinPoolad1
verilog-to-routing/vtr-verilog-to-routing
AndreaMazzan1
lnis-uofu/OpenFPGA
ArslanNustian1161
lnis-uofu/OpenFPGA

Counts cover only the window loaded into ClickHouse and count events, not this account's lifetime totals on GitHub.