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mustafaarslan0

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active 2023-08-23 → 2026-04-06 (UTC) · 189 repositories

Complete coverage27,359 / 27,359 hourly files (100%) · 2 absent upstream2023-08-15 → 2026-09-27 (UTC)
Events
222
Pushes
3
Pull requests
1
Issues
16
Reviews
0
Repositories
189

Activity over time

Daily event counts in the loaded window

Line chart, 958 days from 2023-08-23 to 2026-04-06. Pushes: 3 total, peak 1 in a day. Pull requests: 1 total, peak 1 in a day. Issues: 16 total, peak 2 in a day.

  • Pushes
  • Pull requests
  • Issues

Pull requests and issues are under-captured in the later part of this window. GH Archive progressively stopped recording non-push events during 2026 — −95% or worse by the end of the window. A decline in those two series reflects the archive rather than this account. Pushes stay reliable throughout, so read them as the real signal. Data health has the measurements.

Repositories worked on

Ranked by contributions — pushes, PRs, issues, reviews and comments, so stars and forks do not inflate the list · top 50

RepositoryContributionsPushesPRsIssuesCommentsLast seen
lnis-uofu/OpenFPGA290015142025-12-22
mustafaarslan0/gf180mpw_caravel211002024-09-04
mustafaarslan0/OpenFPGA220002025-08-05
fpganinja/taxi100012025-05-15
verilog-to-routing/vtr-verilog-to-routing100102024-01-04
openhwgroup/pulp_soc000002023-11-02
hdl-modules/hdl-modules000002025-02-07
were/tvm000002023-12-14
Santeep/TT_UM_SERDES000002024-12-18
jomonkjoy/8b10b_serdes000002025-11-11
samidhm/DSP_Slice000002023-08-23
UofT-HPRC/Tbps_CRC000002025-02-05
www-asics-ws/usb2_dev000002026-04-06
pConst/basic_verilog000002025-04-11
adki/DPI_Tutorial000002025-02-28
iammituraj/arbiters000002026-03-11
SystemRDL/PeakRDL000002024-11-13
projf/display_controller000002024-10-16
limbo018/DREAMPlace000002024-08-07
pulp-platform/axi000002024-09-27
subutai-attic/pars000002023-10-16
os-fpga/RTL_Benchmark000002024-02-20
freecores/usbhostslave000002026-04-06
BrunoLevy/learn-fpga000002025-12-15
adam-maj/tiny-gpu000002024-12-12
jonathanko45/SerDes000002024-12-18
AngeloJacobo/UberDDR3000002024-11-20
QL-Proprietary/OpenFPGA000002023-12-25
jatinmandav/Verilog-HDL000002024-10-18
WangXuan95/FPGA-HDMI000002024-11-12
fbrosser/DSP48E1-FP000002025-02-11
ultraembedded/cores000002024-10-30
chipsalliance/f4pga000002023-12-29
ishfaqahmed29/SerDes000002024-12-18
WangXuan95/FPGA-FOC000002024-11-12
Digilent/Pmod-I2S2000002024-09-16
chili-chips-ba/openPCIE000002025-01-28
junganghu/rgmii_ethernet000002024-11-08
wyvernSemi/tcpIpPg000002024-03-29
lowRISC/style-guides000002023-11-08
paxbun/float-matmul000002025-11-26
siliconcompiler/logik000002025-03-19
chipsalliance/Surelog000002024-10-10
brian-team/brian2000002024-09-11
efabless/openlane2000002024-12-14
Doriandarko/o1-engineer000002024-10-03
maria15034/HMAC-SHA256000002024-02-13
povik/yosys-slang000002025-05-23
WangXuan95/FPGA-CAN000002024-11-12
opendatalab/MinerU000002024-12-01

Works with

People who contribute to the same repositories, ranked by how many they share · automation excluded, or every account would appear to work with everyone

ContributorShared reposRepositories in common
AllenDBoston2
verilog-to-routing/vtr-verilog-to-routinglnis-uofu/OpenFPGA
Nakiana2
verilog-to-routing/vtr-verilog-to-routinglnis-uofu/OpenFPGA
Tulong4Dev2
verilog-to-routing/vtr-verilog-to-routinglnis-uofu/OpenFPGA
WazaAbdulkadir2
verilog-to-routing/vtr-verilog-to-routinglnis-uofu/OpenFPGA
alaindargelas2
verilog-to-routing/vtr-verilog-to-routinglnis-uofu/OpenFPGA
amin13772
verilog-to-routing/vtr-verilog-to-routinglnis-uofu/OpenFPGA
coolbreeze4132
verilog-to-routing/vtr-verilog-to-routinglnis-uofu/OpenFPGA
fkosar-ql2
verilog-to-routing/vtr-verilog-to-routinglnis-uofu/OpenFPGA
ganeshgore2
verilog-to-routing/vtr-verilog-to-routinglnis-uofu/OpenFPGA
msaideroglu2
verilog-to-routing/vtr-verilog-to-routinglnis-uofu/OpenFPGA
narutozxp2
verilog-to-routing/vtr-verilog-to-routinglnis-uofu/OpenFPGA
rs-dhow2
verilog-to-routing/vtr-verilog-to-routinglnis-uofu/OpenFPGA
saaramahmoudi2
verilog-to-routing/vtr-verilog-to-routinglnis-uofu/OpenFPGA
tangxifan2
verilog-to-routing/vtr-verilog-to-routinglnis-uofu/OpenFPGA
tpagarani2
verilog-to-routing/vtr-verilog-to-routinglnis-uofu/OpenFPGA
treelin6112
verilog-to-routing/vtr-verilog-to-routinglnis-uofu/OpenFPGA
vaughnbetz2
verilog-to-routing/vtr-verilog-to-routinglnis-uofu/OpenFPGA
AhmadHouraniah1
lnis-uofu/OpenFPGA
AidanJacobsen1
lnis-uofu/OpenFPGA
AlexPoupakis1
verilog-to-routing/vtr-verilog-to-routing
AlexandreSinger1
verilog-to-routing/vtr-verilog-to-routing
AmirhosseinPoolad1
verilog-to-routing/vtr-verilog-to-routing
AndreaMazzan1
lnis-uofu/OpenFPGA
ArslanNustian1161
lnis-uofu/OpenFPGA
Chris2023051
lnis-uofu/OpenFPGA

Counts cover only the window loaded into ClickHouse and count events, not this account's lifetime totals on GitHub.